Q-enhancement with on-chip inductor optimization for reconfigurable Δ-Σ radio-frequency ADC

Conference paper

Lota, J. and Demosthenous, Andreas 2015. Q-enhancement with on-chip inductor optimization for reconfigurable Δ-Σ radio-frequency ADC. IEEE 13th International New Circuits and Systems Conference (NEWCAS), 2015. Grenoble, France 07 - 10 Jun 2015 IEEE. pp. 1-4
AuthorsLota, J. and Demosthenous, Andreas
TypeConference paper
Abstract

The paper details on-chip inductor optimization
for a reconfigurable continuous-time delta-sigma (Δ-Σ) modulator
based radio-frequency analog-to-digital converter. Inductor
optimisation enables the Δ-Σ modulator with Q enhanced LC tank
circuits employing a single high Q-factor on-chip inductor and
lesser quantizer levels thereby reducing the circuit complexity for
excess loop delay, power dissipation and dynamic element
matching. System level simulations indicate at a Q-factor of 75 Δ-
Σ modulator with a 3-level quantizer achieves dynamic ranges of
106, 82 dB and 84 dB for RFID, TETRA, and Galileo over
bandwidths of 200 kHz, 10 MHz and 40 MHz respectively.

Year2015
ConferenceIEEE 13th International New Circuits and Systems Conference (NEWCAS), 2015
PublisherIEEE
Accepted author manuscript
License
CC BY-NC-ND
Publication dates
Print10 Jun 2015
Publication process dates
Deposited22 Sep 2015
Accepted07 Jun 2015
Book title2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS)
Web address (URL)http://dx.doi.org/10.1109/NEWCAS.2015.7182018
Additional information

© 2015 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.

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