Least Upper Delay Bound for VBR Flows in Networks-on-Chip with Virtual Channels
Jafari, F., Lu, Zhonghai and Jantsch, Axel 2015. Least Upper Delay Bound for VBR Flows in Networks-on-Chip with Virtual Channels. Transactions on Design Automation of Electronic Systems. 20 (3).
|Authors||Jafari, F., Lu, Zhonghai and Jantsch, Axel|
Real-time applications such as multimedia and gaming require stringent performance guarantees, usually enforced by a tight upper bound on the maximum end-to-end delay. For FIFO multiplexed on-chip packet switched networks we consider worst-case delay bounds for Variable Bit-Rate (VBR) flows with aggregate scheduling, which schedules multiple flows as an aggregate flow. VBR Flows are characterized by a maximum transfer size (L), peak rate (p), burstiness (σ), and average sustainable rate (ρ). Based on network calculus, we present and prove theorems to derive per-flow end-to-end Equivalent Service Curves (ESC), which are in turn used for computing Least Upper Delay Bounds (LUDBs) of individual flows. In a realistic case study we find that the end-to-end delay bound is up to 46.9% more accurate than the case without considering the traffic peak behavior. Likewise, results also show similar improvements for synthetic traffic patterns. The proposed methodology is implemented in C++ and has low run-time complexity, enabling quick evaluation for large and complex SoCs.
|Keywords||Network-on-chip (NoC); performance evaluation,; network calculus; worst-case delay bound; FIFO multiplexing|
|Journal||Transactions on Design Automation of Electronic Systems|
|Journal citation||20 (3)|
|Accepted author manuscript|
|Web address (URL)||http://dl.acm.org/citation.cfm?id=2733374|
|03 Jun 2015|
|Publication process dates|
|Deposited||08 Mar 2017|
|Copyright information||© ACM 2015. This is the author's version of the work. It is posted here by permission of ACM for your personal use. Not for redistribution. The definitive version was published in F. Jafari, Z. Lu, and A. Jantsch, "Least Upper Delay Bound for VBR Flows in Networks-on-Chip with Virtual Channels", ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 20, No. 3, Article No. 35, June 2015. http://dl.acm.org/citation.cfm?id=2733374|
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